eVaderis provides cost-effective and CMOS compatible non-volatile IP products from single memory cuts, memory compilers (non-volatile memory), to logic libraries (non-volatile kit), and optimized subsystem processor hard macros (non-volatile subsystem). All these products come with different options to better fit application constraints in term of flexibility, functionality, area, power, and performance. We offer easy-to-implement non-volatile digital platforms with strong customer support.
eVaderis products are based on disruptive embedded NVM, such as Spin Transfer Torque Magnetic Random Access Memory (STT-MRAM) and Resistive Random Access Memory (ReRAM), offering embedded SRAM and DRAM-like performance and endurance with density and active power that no other existing embedded NVM technology (embedded Flash, EEPROM or OTP) can provide. These technologies are compatible with all CMOS logic nodes and technologies (including the most aggressive ones such as FDSOI and FinFET) thanks to their integration with the BEOL process. eVaderis, as a first mover and ecosystem enabler, is currently setting up partnerships with major foundries, technology providers, EDA, and 3rd party IP vendors to develop those products. Please, contact us for more information.
eVaderis offers NVRAM through SRAM, Register File, or embedded Flash replacement products that can be customized with different options (multi-VTH, power gating, etc.) to fit customer needs in term of cost, area, performance, and power. Additional options include Single to Multi Port and Single to Multi Context (for NVSRAM only) capabilities. All our products come with SRAM-like interfaces, dedicated controllers and can be provided as single macros or in memory compilers.
eVaderis is providing non-volatile logic libraries through a Non-Volatile Kit (NVK), an extension of the Standard Cell Libraries. These kits include non-volatile sequential cells and more complex macros such as register arrays, counters, specifics controllers, and other features. These libraries allow digital designers to “synthesize” non-volatility, offering new capabilities to their chips trough ultra-low power, high density, local on-chip trimming and fast (re)calibration, distributed state retention, identifiers and more. These libraries come with a setup environment fully compatible with standard digital platforms.
eVaderis helps to accelerate time to tapeout for the implementation of “non-volatile SoC” by offering optimized memory and processor subsystems together with eVaderis’ engineering and expertise. Processor subsystems are based on 3rd party cores and are integrated with our physical IP libraries (NVM and NVK) to provide both new capabilities and higher performances with respect to the CMOS-only equivalent implementation. These capabilities include normally-off, instant-on computing functions (simplify also power management and reduce the standby current at system level), no-boot feature, fast interrupt with fast context switching (context consuming zero leakage), checkpointing mechanisms (freeze and restart), hardware reconfigurability. Thanks to an intermediate and dedicated firmware these processor subsystems will enable customers to run applications with minimal disruption from their existing software.
To cover specifics needs, eVaderis is developing custom parts from memory blocks, logic cells and subsystems to full test chips (for memory technology validation or use case application). We can also generate dedicated EDA views, and perform library (re)characterization if required. Finally, eVaderis has a tight connection to disruptive embedded NVM processes development and can build PDK add-ons together with accurate SPICE modeling.
evaderis also offers training on technology ramp-up and design enablement to ease transitions